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The Complete Verilog Book, by Vivek Sagdeo
Ebook Free The Complete Verilog Book, by Vivek Sagdeo
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The Verilog hardware description language (HDL) provides the ability to describe digital and analog systems. This ability spans the range from descriptions that express conceptual and architectural design to detailed descriptions of implementations in gates and transistors. Verilog was developed originally at Gateway Design Automation Corporation during the mid-eighties. Tools to verify designs expressed in Verilog were implemented at the same time and marketed. Now Verilog is an open standard of IEEE with the number 1364. Verilog HDL is now used universally for digital designs in ASIC, FPGA, microprocessor, DSP and many other kinds of design-centers and is supported by most of the EDA companies. The research and education that is conducted in many universities is also using Verilog. This book introduces the Verilog hardware description language and describes it in a comprehensive manner. Verilog HDL was originally developed and specified with the intent of use with a simulator. Semantics of the language had not been fully described until now. In this book, each feature of the language is described using semantic introduction, syntax and examples. Chapter 4 leads to the full semantics of the language by providing definitions of terms, and explaining data structures and algorithms. The book is written with the approach that Verilog is not only a simulation or synthesis language, or a formal method of describing design, but a complete language addressing all of these aspects. This book covers many aspects of Verilog HDL that are essential parts of any design process.
- Sales Rank: #3687439 in Books
- Brand: Springer
- Published on: 1998-06-30
- Ingredients: Example Ingredients
- Original language: English
- Number of items: 1
- Dimensions: 9.21" h x 1.06" w x 6.14" l, 2.08 pounds
- Binding: Hardcover
- 464 pages
- Used Book in Good Condition
Most helpful customer reviews
6 of 8 people found the following review helpful.
Good reference mediocre for learning.
By A Customer
The book has plenty of code samples, however, many of them have mistakes, making it difficult and sometimes frustrating to study the code. The explanations are not well written when compared to other books (Thomas and Moorby's), however there is some information that cannot be found in other books. An excellent book except for the price and mistakes on nearly every page. If you are already experienced in Verilog, this may be an excellent reference, however, if you are just learning, Thomas Moorby's "The Verilog Hardware Description Language" is an excellent and highly recommended book.
1 of 1 people found the following review helpful.
Good book, high price!
By A Customer
I liked the approach of describing the gate model, dataflow and behavioral model, all in one place, unlike other books. The text is mostly very clear. More state diagrams here and there may clarify. Unfortunatly PLI is not really covered. The CD rom contains only the code: other books provide a free (student version) vhdl simulator. At $ 135.00 + tax, the price is high, compared to other similar books covering the same topic.
A.G. - San Jose, CA
2 of 2 people found the following review helpful.
a great book with almost everything for designers to referen
By A Customer
This book is really a worthwhile book to read and study for advanced topics of designs based on Verilog and Synopsys synthesis tools. The feature-rich topics and details of how the constructs of the designs are made are quite clear and well-written for people involved. The only thing I'm concerned is the price seems to be way way too high to general reader, as it's $135 before tax. Hopefully the price can drop at least 40% less so that everybody can buy it. regards, JKL, San Jose, Calif.
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